Module IBC-2005:
Digital Circuits 2
Digital Circuits 2 2023-24
IBC-2005
2023-24
School of Computer Science & Engineering
Module - Semester 1
10 credits
Module Organiser:
Iestyn Pierce
Overview
Review of Boolean algebra, Karnaugh maps, combinational circuits, programmable logic. CMOS logic. Synchronous Finite State Machines. Analysis and synthesis of ‘Moore’ and ‘Mealy’ synchronous circuits. Partition Minimisation, State Assignment. Asynchronous sequential circuits, analysis, avoiding races and hazards. Synthesis methods. Partition Minimisation for Asynchronous Circuits. State Merge. Circuits for addition, subtraction and multiplication, including speed-up techniques. Carry-look ahead, array multipliers. Multi-operand addition. Wallace and Dadda Trees. The problems of testing complex digital circuits. Path sensitisation. Issues in Synchronous circuit test, design for testability
Assessment Strategy
-threshold -Equivalent to 40%. Uses key areas of theory or knowledge to meet the Learning Outcomes of the module. Is able to formulate an appropriate solution to accurately solve tasks and questions. Can identify individual aspects, but lacks an awareness of links between them and the wider contexts. Outputs can be understood, but lack structure and/or coherence.
-good -Equivalent to the range 60%-69%. Is able to analyse a task or problem to decide which aspects of theory and knowledge to apply. Solutions are of a workable quality, demonstrating understanding of underlying principles. Major themes can be linked appropriately but may not be able to extend this to individual aspects. Outputs are readily understood, with an appropriate structure but may lack sophistication.
-excellent -Equivalent to the range 70%+. Assemble critically evaluated, relevant areas of knowledge and theory to construct professional-level solutions to tasks and questions presented. Is able to cross-link themes and aspects to draw considered conclusions. Presents outputs in a cohesive, accurate, and efficient manner.
Learning Outcomes
- Show a basic knowledge of the common approaches to the testing of digital circuits.
- Understand the principles of asynchronous digital circuit design.
- Understand the principles of synchronous digital circuit design.
- Understand the structure and operation of common circuits used for computer arithmetic.
Assessment method
Exam (Centrally Scheduled)
Assessment type
Summative
Description
Final exam
Weighting
100%